diff options
author | Matt Redfearn <matt.redfearn@mips.com> | 2018-01-05 10:31:07 +0000 |
---|---|---|
committer | James Hogan <jhogan@kernel.org> | 2018-02-05 14:36:03 +0000 |
commit | 7bf8b16d1b60419c865e423b907a05f413745b3e (patch) | |
tree | 44d0b4db47f42e7d2d38f5e946f3d6a23911142a /arch/mips/kernel/signal32.c | |
parent | 0ef1559a20b939f314ea18a810fc486fc9307b77 (diff) | |
download | linux-7bf8b16d1b60419c865e423b907a05f413745b3e.tar.gz linux-7bf8b16d1b60419c865e423b907a05f413745b3e.tar.bz2 linux-7bf8b16d1b60419c865e423b907a05f413745b3e.zip |
MIPS: Generic: Support GIC in EIC mode
The GIC supports running in External Interrupt Controller (EIC) mode,
and will signal this via cpu_has_veic if enabled in hardware. Currently
the generic kernel will panic if cpu_has_veic is set - but the GIC can
legitimately set this flag if either configured to boot in EIC mode, or
if the GIC driver enables this mode. Make the kernel not panic in this
case, and instead just check if the GIC is present. If so, use it's CPU
local interrupt routing functions. If an EIC is present, but it is not
the GIC, then the kernel does not know how to get the VIRQ for the CPU
local interrupts and should panic. Support for alternative EICs being
present is needed here for the generic kernel to support them.
Suggested-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18191/
Signed-off-by: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'arch/mips/kernel/signal32.c')
0 files changed, 0 insertions, 0 deletions