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author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-10-03 09:31:55 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-10-03 09:31:55 -0700 |
commit | fb443f36f3b9af6a4590b6e65e2d7affdfe0da18 (patch) | |
tree | d75c56cb56f1b6c7cb1b3119ebf3d17f6ded51c5 /arch/mips/lantiq/prom.c | |
parent | 4fe89d07dcc2804c8b562f6c7896a45643d34b2f (diff) | |
parent | 90c2d2eb7ab5848c4f853751f12b96bdc460ad1b (diff) | |
download | linux-fb443f36f3b9af6a4590b6e65e2d7affdfe0da18.tar.gz linux-fb443f36f3b9af6a4590b6e65e2d7affdfe0da18.tar.bz2 linux-fb443f36f3b9af6a4590b6e65e2d7affdfe0da18.zip |
Merge tag 'mips_6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- mainly cleanups
- fix enabling interrupts on second VPE for Lantiq platform
- switch to use gpiod API
- allow firmware passing RND seed
* tag 'mips_6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (29 commits)
MIPS: pci: lantiq: switch to using gpiod API
mips: allow firmware to pass RNG seed to kernel
MIPS: Simplify __bswapdi2() and __bswapsi2()
MIPS: Silence missing prototype warning
mips: update config files
MIPS: Lantiq: vmmc: fix compile break introduced by gpiod patch
MIPS: IRQ: remove orphan allocate_irqno() declaration
MIPS: remove orphan sb1250_time_init() declaration
MIPS: Lantiq: switch vmmc to use gpiod API
MIPS: lantiq: enable all hardware interrupts on second VPE
MIPS: BCM47XX: Cast memcmp() of function to (void *)
mips: ralink: convert to DEFINE_SHOW_ATTRIBUTE
mips: kernel: convert to DEFINE_SHOW_ATTRIBUTE
mips: cavium: convert to DEFINE_SHOW_ATTRIBUTE
MIPS: AR7: remove orphan declarations from arch/mips/include/asm/mach-ar7/ar7.h
MIPS: remove orphan sni_cpu_time_init() declaration
MIPS: IRQ: remove orphan declarations from arch/mips/include/asm/irq.h
MIPS: Octeon: remove orphan octeon_hal_setup_reserved32() declaration
MIPS: Octeon: remove orphan cvmx_fpa_setup_pool() declaration
MIPS: Octeon: remove orphan octeon_swiotlb declaration
...
Diffstat (limited to 'arch/mips/lantiq/prom.c')
-rw-r--r-- | arch/mips/lantiq/prom.c | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c index c731082a0c42..be4829cc7a3a 100644 --- a/arch/mips/lantiq/prom.c +++ b/arch/mips/lantiq/prom.c @@ -34,6 +34,14 @@ unsigned long physical_memsize = 0L; */ static struct ltq_soc_info soc_info; +/* + * These structs are used to override vsmp_init_secondary() + */ +#if defined(CONFIG_MIPS_MT_SMP) +extern const struct plat_smp_ops vsmp_smp_ops; +static struct plat_smp_ops lantiq_smp_ops; +#endif + const char *get_system_type(void) { return soc_info.sys_type; @@ -84,6 +92,17 @@ void __init plat_mem_setup(void) __dt_setup_arch(dtb); } +#if defined(CONFIG_MIPS_MT_SMP) +static void lantiq_init_secondary(void) +{ + /* + * MIPS CPU startup function vsmp_init_secondary() will only + * enable some of the interrupts for the second CPU/VPE. + */ + set_c0_status(ST0_IM); +} +#endif + void __init prom_init(void) { /* call the soc specific detetcion code and get it to fill soc_info */ @@ -95,7 +114,10 @@ void __init prom_init(void) prom_init_cmdline(); #if defined(CONFIG_MIPS_MT_SMP) - if (register_vsmp_smp_ops()) - panic("failed to register_vsmp_smp_ops()"); + if (cpu_has_mipsmt) { + lantiq_smp_ops = vsmp_smp_ops; + lantiq_smp_ops.init_secondary = lantiq_init_secondary; + register_smp_ops(&lantiq_smp_ops); + } #endif } |