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authorJohn Crispin <john@phrozen.org>2016-12-20 19:12:40 +0100
committerRalf Baechle <ralf@linux-mips.org>2017-01-03 16:34:46 +0100
commit4f79ddec04229c966326d90cc3cfd414401dea22 (patch)
tree3cfb07441061ff70a2618406ee90c87576bf8efa /arch/mips/ralink
parentef462f3b64e9fb0c8e1cd5d60f5bd7f13ac2156d (diff)
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MIPS: ralink: MT7621 does not set its SoC type.
The code does not set the SoC type properly. This went unnoticed until now as the SoC does not share any of the driver code with the other SoCs, until we made the mmc driver work. Signed-off-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14896/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/mt7621.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c
index a45bbbe97ac5..3ffa4ba78131 100644
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
@@ -181,7 +181,7 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
} else {
panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
}
-
+ ralink_soc = MT762X_SOC_MT7621AT;
rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,