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authorMaciej W. Rozycki <macro@linux-mips.org>2013-09-17 16:58:10 +0100
committerRalf Baechle <ralf@linux-mips.org>2013-09-18 20:25:19 +0200
commit8ff374b9c296b96484d5e63b45b22d0862ffee8f (patch)
tree0a40c8b881b985854a58793b14ca7b4de9c6f123 /arch/mips/sni
parentb42b4f3af8b1ac2f7b09781d523bf918f366d8d6 (diff)
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MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout. The change does not touch places that use shifted or partial masks. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sni')
-rw-r--r--arch/mips/sni/setup.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 5b09b3544edd..efad85c8c823 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -25,6 +25,7 @@
#endif
#include <asm/bootinfo.h>
+#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/sni.h>
@@ -173,7 +174,7 @@ void __init plat_mem_setup(void)
system_type = "RM300-Cxx";
break;
case SNI_BRD_PCI_DESKTOP:
- switch (read_c0_prid() & 0xff00) {
+ switch (read_c0_prid() & PRID_IMP_MASK) {
case PRID_IMP_R4600:
case PRID_IMP_R4700:
system_type = "RM200-C20";