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| author | Ralf Baechle <ralf@linux-mips.org> | 2011-11-28 16:11:28 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 22:01:45 +0000 |
| commit | 3d18c98367eac23555ea4887c4f570423474eeaf (patch) | |
| tree | 4f9e12003a5acf46c1aea74e7835b4e72814bf93 /arch/mips | |
| parent | ab75dc02c151c9d2a2fd446334d740b097a3b9db (diff) | |
| download | linux-3d18c98367eac23555ea4887c4f570423474eeaf.tar.gz linux-3d18c98367eac23555ea4887c4f570423474eeaf.tar.bz2 linux-3d18c98367eac23555ea4887c4f570423474eeaf.zip | |
MIPS: Fix Jazz 64-bit build error.
Move add_wired_entry to its own header file from where it will be
always included. Patch up other users of add_wired_entry to also include
the header as needed.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/pgtable-32.h | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/tlbmisc.h | 10 | ||||
| -rw-r--r-- | arch/mips/jazz/irq.c | 1 | ||||
| -rw-r--r-- | arch/mips/jazz/setup.c | 1 | ||||
| -rw-r--r-- | arch/mips/mm/tlb-r3k.c | 1 | ||||
| -rw-r--r-- | arch/mips/mm/tlb-r4k.c | 1 | ||||
| -rw-r--r-- | arch/mips/pci/pci-alchemy.c | 1 |
7 files changed, 15 insertions, 6 deletions
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h index 8a153d2fa62a..469390656c3f 100644 --- a/arch/mips/include/asm/pgtable-32.h +++ b/arch/mips/include/asm/pgtable-32.h @@ -19,12 +19,6 @@ #include <asm-generic/pgtable-nopmd.h> /* - * - add_wired_entry() add a fixed TLB entry, and move wired register - */ -extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, - unsigned long entryhi, unsigned long pagemask); - -/* * - add_temporary_entry() add a temporary TLB entry. We use TLB entries * starting at the top and working down. This is for populating the * TLB before trap_init() puts the TLB miss handler in place. It diff --git a/arch/mips/include/asm/tlbmisc.h b/arch/mips/include/asm/tlbmisc.h new file mode 100644 index 000000000000..3a452282cba0 --- /dev/null +++ b/arch/mips/include/asm/tlbmisc.h @@ -0,0 +1,10 @@ +#ifndef __ASM_TLBMISC_H +#define __ASM_TLBMISC_H + +/* + * - add_wired_entry() add a fixed TLB entry, and move wired register + */ +extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, + unsigned long entryhi, unsigned long pagemask); + +#endif /* __ASM_TLBMISC_H */ diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index ca9bd2069142..99ab86ffa4c0 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -20,6 +20,7 @@ #include <asm/io.h> #include <asm/jazz.h> #include <asm/pgtable.h> +#include <asm/tlbmisc.h> static DEFINE_RAW_SPINLOCK(r4030_lock); diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c index 0d0f054a02f4..820e926dacbc 100644 --- a/arch/mips/jazz/setup.c +++ b/arch/mips/jazz/setup.c @@ -21,6 +21,7 @@ #include <asm/jazzdma.h> #include <asm/reboot.h> #include <asm/pgtable.h> +#include <asm/tlbmisc.h> extern asmlinkage void jazz_handle_int(void); diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c index 87bb85d8d537..ed1fa460f84e 100644 --- a/arch/mips/mm/tlb-r3k.c +++ b/arch/mips/mm/tlb-r3k.c @@ -20,6 +20,7 @@ #include <asm/pgtable.h> #include <asm/mmu_context.h> #include <asm/system.h> +#include <asm/tlbmisc.h> #include <asm/isadep.h> #include <asm/io.h> #include <asm/bootinfo.h> diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 0d394e0e8837..d163455552b0 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -19,6 +19,7 @@ #include <asm/mmu_context.h> #include <asm/pgtable.h> #include <asm/system.h> +#include <asm/tlbmisc.h> extern void build_tlb_refill_handler(void); diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c index b5eddf533c0b..ec125bed721c 100644 --- a/arch/mips/pci/pci-alchemy.c +++ b/arch/mips/pci/pci-alchemy.c @@ -17,6 +17,7 @@ #include <linux/vmalloc.h> #include <asm/mach-au1x00/au1000.h> +#include <asm/tlbmisc.h> #ifdef CONFIG_DEBUG_PCI #define DBG(x...) printk(KERN_DEBUG x) |