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| author | James Hogan <james.hogan@imgtec.com> | 2015-01-29 11:14:10 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-03-31 12:04:12 +0200 |
| commit | 602e8a345a916e91256497e13575d0690cd1565f (patch) | |
| tree | 4bcde796a2ec456771ece363435c3ac76591c53a /arch/mips | |
| parent | 6429e2b6fc05d8640bb94f5b67c047e936707f31 (diff) | |
| download | linux-602e8a345a916e91256497e13575d0690cd1565f.tar.gz linux-602e8a345a916e91256497e13575d0690cd1565f.tar.bz2 linux-602e8a345a916e91256497e13575d0690cd1565f.zip | |
MIPS: Malta: Implement get_c0_fdc_int()
Implement the weak get_c0_fdc_int() function for Malta. The Fast Debug
Channel (FDC) interrupt is obtained mainly depending on whether a GIC is
present. Vectored external interrupt mode isn't yet supported.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9143/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/mti-malta/malta-time.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index ce02dbdedc62..7d4b86571564 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c @@ -115,6 +115,22 @@ void read_persistent_clock(struct timespec *ts) ts->tv_nsec = 0; } +int get_c0_fdc_int(void) +{ + int mips_cpu_fdc_irq; + + if (cpu_has_veic) + mips_cpu_fdc_irq = -1; + else if (gic_present) + mips_cpu_fdc_irq = gic_get_c0_fdc_int(); + else if (cp0_fdc_irq >= 0) + mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq; + else + mips_cpu_fdc_irq = -1; + + return mips_cpu_fdc_irq; +} + int get_c0_perfcount_int(void) { if (cpu_has_veic) { |