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author | Stafford Horne <shorne@gmail.com> | 2024-03-30 14:54:51 +0000 |
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committer | Stafford Horne <shorne@gmail.com> | 2024-04-15 15:20:39 +0100 |
commit | 1f33446d0efb101eafad92daf08f711f60daae1a (patch) | |
tree | 07e64552d54db09d4402e54e5ea81a6bd94b3e0e /arch/openrisc | |
parent | c88cfb5cea5f8f9868ef02cc9ce9183a26dcf20f (diff) | |
download | linux-1f33446d0efb101eafad92daf08f711f60daae1a.tar.gz linux-1f33446d0efb101eafad92daf08f711f60daae1a.tar.bz2 linux-1f33446d0efb101eafad92daf08f711f60daae1a.zip |
openrisc: Add FPU config
Allow disabling FPU related code sequences to save space.
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc')
-rw-r--r-- | arch/openrisc/Kconfig | 9 | ||||
-rw-r--r-- | arch/openrisc/kernel/ptrace.c | 6 | ||||
-rw-r--r-- | arch/openrisc/kernel/traps.c | 3 |
3 files changed, 17 insertions, 1 deletions
diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index 3586cda55bde..69c0258700b2 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -188,6 +188,15 @@ config SMP If you don't know what to do here, say N. +config FPU + bool "FPU support" + default y + help + Say N here if you want to disable all floating-point related procedures + in the kernel and reduce binary size. + + If you don't know what to do here, say Y. + source "kernel/Kconfig.hz" config OPENRISC_NO_SPR_SR_DSX diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c index 1eeac3b62e9d..cf410193095f 100644 --- a/arch/openrisc/kernel/ptrace.c +++ b/arch/openrisc/kernel/ptrace.c @@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target, return ret; } +#ifdef CONFIG_FPU /* * As OpenRISC shares GPRs and floating point registers we don't need to export * the floating point registers again. So here we only export the fpcsr special @@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target, ®s->fpcsr, 0, 4); return ret; } +#endif /* * Define the register sets available on OpenRISC under Linux */ enum or1k_regset { REGSET_GENERAL, +#ifdef CONFIG_FPU REGSET_FPU, +#endif }; static const struct user_regset or1k_regsets[] = { @@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = { .regset_get = genregs_get, .set = genregs_set, }, +#ifdef CONFIG_FPU [REGSET_FPU] = { .core_note_type = NT_PRFPREG, .n = sizeof(struct __or1k_fpu_state) / sizeof(long), @@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = { .regset_get = fpregs_get, .set = fpregs_set, }, +#endif }; static const struct user_regset_view user_or1k_native_view = { diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index 211ddaa0c5fa..57e0d674eb04 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) { if (user_mode(regs)) { int code = FPE_FLTUNK; +#ifdef CONFIG_FPU unsigned long fpcsr = regs->fpcsr; if (fpcsr & SPR_FPCSR_IVF) @@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) /* Clear all flags */ regs->fpcsr &= ~SPR_FPCSR_ALLF; - +#endif force_sig_fault(SIGFPE, code, (void __user *)regs->pc); } else { pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc); |