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| author | Kajol Jain <kjain@linux.ibm.com> | 2022-06-10 19:11:13 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-06-29 08:57:45 +1000 |
| commit | ab8bca92aebcb59d81dc95ddebe241052f2bb411 (patch) | |
| tree | 12e633c0db2f7a2aac3940065a1a17f571de029d /arch/powerpc/kernel/dawr.c | |
| parent | 9ac92fecd1dbfcabd64925571b94151d7a814878 (diff) | |
| download | linux-ab8bca92aebcb59d81dc95ddebe241052f2bb411.tar.gz linux-ab8bca92aebcb59d81dc95ddebe241052f2bb411.tar.bz2 linux-ab8bca92aebcb59d81dc95ddebe241052f2bb411.zip | |
selftests/powerpc/pmu: Add test for hardware cache events
The testcase checks if the transalation of a generic hardware cache
event is done properly via perf interface. The hardware cache events has
type as PERF_TYPE_HW_CACHE and each event points to raw event code id.
Testcase checks different combination of cache level, cache event
operation type and cache event result type and verify for a given event
code, whether transalation matches with the current cache event mappings
via perf interface.
Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-36-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'arch/powerpc/kernel/dawr.c')
0 files changed, 0 insertions, 0 deletions