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authorKumar Gala <galak@kernel.crashing.org>2008-06-16 09:41:32 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-06-18 16:17:56 -0500
commit3dfa8773674e16f95f70a0e631e80c69390d04d7 (patch)
tree95e8989bbc8373e61f69ca2ac4c98ffd3c709bd9 /arch/powerpc/kernel/head_booke.h
parentbccaea8fe287454d70f5b2546910561e9f884053 (diff)
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powerpc/booke: Add support for new e500mc core
The new e500mc core from Freescale is based on the e500v2 but with the following changes: * Supports only the Enhanced Debug Architecture (DSRR0/1, etc) * Floating Point * No SPE * Supports lwsync * Doorbell Exceptions * Hypervisor * Cache line size is now 64-bytes (e500v1/v2 have a 32-byte cache line) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_booke.h')
-rw-r--r--arch/powerpc/kernel/head_booke.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 9501c580ce87..505494f1ee7c 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -68,9 +68,13 @@
#define MCHECK_STACK_BASE mcheckirq_ctx
#define CRIT_STACK_BASE critirq_ctx
-/* only on e200 for now */
+/* only on e500mc/e200 */
#define DEBUG_STACK_BASE dbgirq_ctx
+#ifdef CONFIG_PPC_E500MC
+#define DEBUG_SPRG SPRN_SPRG9
+#else
#define DEBUG_SPRG SPRN_SPRG6W
+#endif
#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)