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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-04-17 19:08:18 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-05-18 00:09:06 +1000 |
| commit | a1f3ae3fe8a1883c339f1bc89d1c941b3809e084 (patch) | |
| tree | d830fbdffa3dac41aba47c6683b3fe08413ebc7e /arch/powerpc/kernel/ppc_save_regs.S | |
| parent | 24c78586cc6798028205e12c34febf0337bcbded (diff) | |
| download | linux-a1f3ae3fe8a1883c339f1bc89d1c941b3809e084.tar.gz linux-a1f3ae3fe8a1883c339f1bc89d1c941b3809e084.tar.bz2 linux-a1f3ae3fe8a1883c339f1bc89d1c941b3809e084.zip | |
powerpc/32: Use stmw/lmw for registers save/restore in asm
arch/powerpc/Makefile activates -mmultiple on BE PPC32 configs
in order to use multiple word instructions in functions entry/exit.
The patch does the same for the asm parts, for consistency.
On processors like the 8xx on which insn fetching is pretty slow,
this speeds up registers save/restore.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
[mpe: PPC32 is BE only, so drop the endian checks]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/ppc_save_regs.S')
| -rw-r--r-- | arch/powerpc/kernel/ppc_save_regs.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/ppc_save_regs.S b/arch/powerpc/kernel/ppc_save_regs.S index 1b1787d52896..8afbe213d729 100644 --- a/arch/powerpc/kernel/ppc_save_regs.S +++ b/arch/powerpc/kernel/ppc_save_regs.S @@ -25,6 +25,9 @@ */ _GLOBAL(ppc_save_regs) PPC_STL r0,0*SZL(r3) +#ifdef CONFIG_PPC32 + stmw r2, 2*SZL(r3) +#else PPC_STL r2,2*SZL(r3) PPC_STL r3,3*SZL(r3) PPC_STL r4,4*SZL(r3) @@ -55,6 +58,7 @@ _GLOBAL(ppc_save_regs) PPC_STL r29,29*SZL(r3) PPC_STL r30,30*SZL(r3) PPC_STL r31,31*SZL(r3) +#endif /* go up one stack frame for SP */ PPC_LL r4,0(r1) PPC_STL r4,1*SZL(r3) |