summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/kvm/book3s_64_entry.S
diff options
context:
space:
mode:
authorNicholas Piggin <npiggin@gmail.com>2021-11-23 19:52:17 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2021-11-24 21:09:01 +1100
commitcf3b16cfa6503b1fe5e680f9711262e6a51ef097 (patch)
treedcb79e025bb6667dbd17750608ed1062c88cbb48 /arch/powerpc/kvm/book3s_64_entry.S
parent5236756d04454c7ce9f45e27b434d75b8d6f8759 (diff)
downloadlinux-cf3b16cfa6503b1fe5e680f9711262e6a51ef097.tar.gz
linux-cf3b16cfa6503b1fe5e680f9711262e6a51ef097.tar.bz2
linux-cf3b16cfa6503b1fe5e680f9711262e6a51ef097.zip
KVM: PPC: Book3S HV P9: Comment and fix MMU context switching code
Tighten up partition switching code synchronisation and comments. In particular, hwsync ; isync is required after the last access that is performed in the context of a partition, before the partition is switched away from. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211123095231.1036501-40-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/kvm/book3s_64_entry.S')
-rw-r--r--arch/powerpc/kvm/book3s_64_entry.S11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/powerpc/kvm/book3s_64_entry.S b/arch/powerpc/kvm/book3s_64_entry.S
index 983b8c18bc31..05e003eb5d90 100644
--- a/arch/powerpc/kvm/book3s_64_entry.S
+++ b/arch/powerpc/kvm/book3s_64_entry.S
@@ -374,11 +374,16 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
BEGIN_FTR_SECTION
mtspr SPRN_DAWRX1,r10
END_FTR_SECTION_IFSET(CPU_FTR_DAWR1)
- mtspr SPRN_PID,r10
/*
- * Switch to host MMU mode
+ * Switch to host MMU mode (don't have the real host PID but we aren't
+ * going back to userspace).
*/
+ hwsync
+ isync
+
+ mtspr SPRN_PID,r10
+
ld r10, HSTATE_KVM_VCPU(r13)
ld r10, VCPU_KVM(r10)
lwz r10, KVM_HOST_LPID(r10)
@@ -389,6 +394,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_DAWR1)
ld r10, KVM_HOST_LPCR(r10)
mtspr SPRN_LPCR,r10
+ isync
+
/*
* Set GUEST_MODE_NONE so the handler won't branch to KVM, and clear
* MSR_RI in r12 ([H]SRR1) so the handler won't try to return.