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| author | Paolo Bonzini <pbonzini@redhat.com> | 2024-11-14 07:06:24 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-11-14 07:06:24 -0500 |
| commit | 0586ade9e7f9491ccbe1e00975978cb9c2093006 (patch) | |
| tree | 3dbb536e37d3e86086bd51dcee4bf81041bac087 /arch/powerpc/kvm | |
| parent | 7b541d557f705c7e5bcd874f3b960c8fb8dee562 (diff) | |
| parent | 9899b8201025d00b23aee143594a30c55cc4cc35 (diff) | |
| download | linux-0586ade9e7f9491ccbe1e00975978cb9c2093006.tar.gz linux-0586ade9e7f9491ccbe1e00975978cb9c2093006.tar.bz2 linux-0586ade9e7f9491ccbe1e00975978cb9c2093006.zip | |
Merge tag 'loongarch-kvm-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson into HEAD
LoongArch KVM changes for v6.13
1. Add iocsr and mmio bus simulation in kernel.
2. Add in-kernel interrupt controller emulation.
3. Add virt extension support for eiointc irqchip.
Diffstat (limited to 'arch/powerpc/kvm')
| -rw-r--r-- | arch/powerpc/kvm/book3s_hv.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index ba0492f9de65..ad8dc4ccdaab 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -4898,6 +4898,18 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, BOOK3S_INTERRUPT_EXTERNAL, 0); else lpcr |= LPCR_MER; + } else { + /* + * L1's copy of L2's LPCR (vcpu->arch.vcore->lpcr) can get its MER bit + * unexpectedly set - for e.g. during NMI handling when all register + * states are synchronized from L0 to L1. L1 needs to inform L0 about + * MER=1 only when there are pending external interrupts. + * In the above if check, MER bit is set if there are pending + * external interrupts. Hence, explicity mask off MER bit + * here as otherwise it may generate spurious interrupts in L2 KVM + * causing an endless loop, which results in L2 guest getting hung. + */ + lpcr &= ~LPCR_MER; } } else if (vcpu->arch.pending_exceptions || vcpu->arch.doorbell_request || |