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author | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> | 2018-12-09 14:55:36 +0530 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-01-08 19:22:47 +1100 |
commit | 6529870cb0323823f49b3e95d1760383910f96cd (patch) | |
tree | 0c872b0687b7bcdf74da380b341fbb3ca347598c /arch/powerpc/perf | |
parent | bfeffd155283772bbe78c6a05dec7c0128ee500c (diff) | |
download | linux-6529870cb0323823f49b3e95d1760383910f96cd.tar.gz linux-6529870cb0323823f49b3e95d1760383910f96cd.tar.bz2 linux-6529870cb0323823f49b3e95d1760383910f96cd.zip |
powerpc/perf: Update perf_regs structure to include MMCRA
On each sample, Monitor Mode Control Register A (MMCRA) content is
saved in pt_regs. MMCRA does not have a entry as-is in the pt_regs but
instead, MMCRA content is saved in the "dsisr" register of pt_regs.
Patch adds another entry to the perf_regs structure to include the
"MMCRA" printing which internally maps to the "dsisr" of pt_regs.
It also check for the MMCRA availability in the platform and present
value accordingly
mpe: This was the 2nd patch in a series with commit 333804dc3b7a
("powerpc/perf: Update perf_regs structure to include SIER") but I
accidentally only merged the 1st patch, so merge this one now.
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/perf')
-rw-r--r-- | arch/powerpc/perf/perf_regs.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c index 5c36b3a8d47a..3349f3f8fe84 100644 --- a/arch/powerpc/perf/perf_regs.c +++ b/arch/powerpc/perf/perf_regs.c @@ -70,6 +70,7 @@ static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = { PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar), PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr), PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar), + PT_REGS_OFFSET(PERF_REG_POWERPC_MMCRA, dsisr), }; u64 perf_reg_value(struct pt_regs *regs, int idx) @@ -83,6 +84,11 @@ u64 perf_reg_value(struct pt_regs *regs, int idx) !is_sier_available())) return 0; + if (idx == PERF_REG_POWERPC_MMCRA && + (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) || + IS_ENABLED(CONFIG_PPC32))) + return 0; + return regs_get_register(regs, pt_regs_offset[idx]); } |