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| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2020-05-19 05:49:25 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-05-26 22:22:23 +1000 |
| commit | da1adea07576722da4597b0df7d00931f0203229 (patch) | |
| tree | f638ecdb345c8a2f375f7c7ff1013a1cbbaa01e1 /arch/powerpc/platforms/8xx/Kconfig | |
| parent | cf209951fa7f2e7a8ec92f45f27ea11bc024bbfc (diff) | |
| download | linux-da1adea07576722da4597b0df7d00931f0203229.tar.gz linux-da1adea07576722da4597b0df7d00931f0203229.tar.bz2 linux-da1adea07576722da4597b0df7d00931f0203229.zip | |
powerpc/8xx: Allow STRICT_KERNEL_RwX with pinned TLB
Pinned TLB are 8M. Now that there is no strict boundary anymore
between text and RO data, it is possible to use 8M pinned executable
TLB that covers both text and RO data.
When PIN_TLB_DATA or PIN_TLB_TEXT is selected, enforce 8M RW data
alignment and allow STRICT_KERNEL_RWX.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c535fc97bf0dd8693192e25feeed8088701e00c6.1589866984.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/platforms/8xx/Kconfig')
| -rw-r--r-- | arch/powerpc/platforms/8xx/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig index 04ea1a8a0bdc..05669f2fadce 100644 --- a/arch/powerpc/platforms/8xx/Kconfig +++ b/arch/powerpc/platforms/8xx/Kconfig @@ -167,7 +167,7 @@ menu "8xx advanced setup" config PIN_TLB bool "Pinned Kernel TLBs" - depends on ADVANCED_OPTIONS && !DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX + depends on ADVANCED_OPTIONS && !DEBUG_PAGEALLOC help On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each table 4 TLBs can be pinned. |