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authorMadhavan Srinivasan <maddy@linux.vnet.ibm.com>2017-02-12 22:33:13 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2017-02-17 21:48:53 +1100
commit8a088542c8f8d0bb458e4db2c01a2534f1adaf47 (patch)
treebdadf0808c166621fa36338219b208f4c836b25d /arch/powerpc
parenta114aca57a59cd92189bf3795ac082a5e8fac0f1 (diff)
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powerpc/perf: Use PM_INST_DISP for generic instructions sample
Since PM_INST_CMPL may not provide right counts in all sampling scenarios in power9 DD1, instead use PM_INST_DISP. Patch also update generic instruction sampling with the same. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/perf/power9-pmu.c20
1 files changed, 18 insertions, 2 deletions
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index b38acff8a791..454e9f70894f 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -228,6 +228,17 @@ static const struct attribute_group *power9_pmu_attr_groups[] = {
NULL,
};
+static int power9_generic_events_dd1[] = {
+ [PERF_COUNT_HW_CPU_CYCLES] = PM_CYC,
+ [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_ICT_NOSLOT_CYC,
+ [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = PM_CMPLU_STALL,
+ [PERF_COUNT_HW_INSTRUCTIONS] = PM_INST_DISP,
+ [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PM_BRU_CMPL,
+ [PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL,
+ [PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1,
+ [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1_FIN,
+};
+
static int power9_generic_events[] = {
[PERF_COUNT_HW_CPU_CYCLES] = PM_CYC,
[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_ICT_NOSLOT_CYC,
@@ -401,8 +412,8 @@ static struct power_pmu power9_isa207_pmu = {
.get_alternatives = power9_get_alternatives,
.disable_pmc = isa207_disable_pmc,
.flags = PPMU_NO_SIAR | PPMU_ARCH_207S,
- .n_generic = ARRAY_SIZE(power9_generic_events),
- .generic_events = power9_generic_events,
+ .n_generic = ARRAY_SIZE(power9_generic_events_dd1),
+ .generic_events = power9_generic_events_dd1,
.cache_events = &power9_cache_events,
.attr_groups = power9_isa207_pmu_attr_groups,
.bhrb_nr = 32,
@@ -437,6 +448,11 @@ static int __init init_power9_pmu(void)
return -ENODEV;
if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
+ /*
+ * Since PM_INST_CMPL may not provide right counts in all
+ * sampling scenarios in power9 DD1, instead use PM_INST_DISP.
+ */
+ EVENT_VAR(PM_INST_CMPL, _g).id = PM_INST_DISP;
rc = register_power_pmu(&power9_isa207_pmu);
} else {
rc = register_power_pmu(&power9_pmu);