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| author | Geert Uytterhoeven <geert@linux-m68k.org> | 2021-12-17 13:49:25 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-01-09 10:11:11 -0800 |
| commit | 53abf98005a6bcabb4ddeff642ba36cd1cf4184a (patch) | |
| tree | 3192fef5b607071ce41e4491f92f30a766494a4a /arch/riscv/boot | |
| parent | 53ef07326ad0d6ae7fefded22bc53b427d542761 (diff) | |
| download | linux-53abf98005a6bcabb4ddeff642ba36cd1cf4184a.tar.gz linux-53abf98005a6bcabb4ddeff642ba36cd1cf4184a.tar.bz2 linux-53abf98005a6bcabb4ddeff642ba36cd1cf4184a.zip | |
riscv: dts: microchip: mpfs: Fix PLIC node
Fix the device node for the Platform-Level Interrupt Controller (PLIC):
- Add missing "#address-cells" property,
- Sort properties according to DT bindings.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index 794da883acb1..ee59751544a0 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -168,16 +168,17 @@ }; plic: interrupt-controller@c000000 { - #interrupt-cells = <1>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,ndev = <186>; + #address-cells = <0>; + #interrupt-cells = <1>; interrupt-controller; interrupts-extended = <&cpu0_intc 11 &cpu1_intc 11 &cpu1_intc 9 &cpu2_intc 11 &cpu2_intc 9 &cpu3_intc 11 &cpu3_intc 9 &cpu4_intc 11 &cpu4_intc 9>; + riscv,ndev = <186>; }; dma@3000000 { |