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| author | Alexandre Ghiti <alex@ghiti.fr> | 2019-05-26 08:50:38 -0400 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-07-03 15:23:38 -0700 |
| commit | 9e953cda5cdf1c230a3c9b7fc4d5e94f15885a9b (patch) | |
| tree | b3f437ffbfa33f52497f1bd80a62c31d9799284e /arch/riscv/include/asm/pgtable.h | |
| parent | 3876d4a38ae22bb56311abf5ea418eac46090c00 (diff) | |
| download | linux-9e953cda5cdf1c230a3c9b7fc4d5e94f15885a9b.tar.gz linux-9e953cda5cdf1c230a3c9b7fc4d5e94f15885a9b.tar.bz2 linux-9e953cda5cdf1c230a3c9b7fc4d5e94f15885a9b.zip | |
riscv: Introduce huge page support for 32/64bit kernel
This patch implements both 4MB huge page support for 32bit kernel
and 2MB/1GB huge pages support for 64bit kernel.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv/include/asm/pgtable.h')
| -rw-r--r-- | arch/riscv/include/asm/pgtable.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index f7c3f7de15f2..18ea56fabba8 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -113,7 +113,6 @@ static inline void pmd_clear(pmd_t *pmdp) set_pmd(pmdp, __pmd(0)); } - static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot) { return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); @@ -250,6 +249,11 @@ static inline pte_t pte_mkspecial(pte_t pte) return __pte(pte_val(pte) | _PAGE_SPECIAL); } +static inline pte_t pte_mkhuge(pte_t pte) +{ + return pte; +} + /* Modify page protection bits */ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { @@ -409,7 +413,7 @@ static inline void pgtable_cache_init(void) #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) /* - * Task size is 0x40000000000 for RV64 or 0xb800000 for RV32. + * Task size is 0x4000000000 for RV64 or 0xb800000 for RV32. * Note that PGDIR_SIZE must evenly divide TASK_SIZE. */ #ifdef CONFIG_64BIT |