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authorSunil V L <sunilvl@ventanamicro.com>2023-10-18 18:10:07 +0530
committerPalmer Dabbelt <palmer@rivosinc.com>2023-10-26 09:40:34 -0700
commit2960f371f1653f6d8bc2321120eba2a14c861d4c (patch)
tree39312ac65dd2961215856574a7de694bc9f8ff41 /arch/riscv/include
parent9ca87564190cf0e5bb72695fb0db9947fcc47843 (diff)
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RISC-V: cacheflush: Initialize CBO variables on ACPI systems
Initialize the CBO variables on ACPI based systems using information in RHCT. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20231018124007.1306159-5-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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