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| author | Alexandre Ghiti <alexghiti@rivosinc.com> | 2024-05-23 13:51:34 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-05-23 08:22:17 -0700 |
| commit | 6ca445d8af0ed5950ebf899415fd6bfcd7d9d7a3 (patch) | |
| tree | 0927a03832641e507c08fbec6ed867cae878fc1c /arch/riscv/include | |
| parent | 46cad6cd9b10ab14acf20e0779998f88c6e44c4f (diff) | |
| download | linux-6ca445d8af0ed5950ebf899415fd6bfcd7d9d7a3.tar.gz linux-6ca445d8af0ed5950ebf899415fd6bfcd7d9d7a3.tar.bz2 linux-6ca445d8af0ed5950ebf899415fd6bfcd7d9d7a3.zip | |
riscv: Fix early ftrace nop patching
Commit c97bf629963e ("riscv: Fix text patching when IPI are used")
converted ftrace_make_nop() to use patch_insn_write() which does not
emit any icache flush relying entirely on __ftrace_modify_code() to do
that.
But we missed that ftrace_make_nop() was called very early directly when
converting mcount calls into nops (actually on riscv it converts 2B nops
emitted by the compiler into 4B nops).
This caused crashes on multiple HW as reported by Conor and Björn since
the booting core could have half-patched instructions in its icache
which would trigger an illegal instruction trap: fix this by emitting a
local flush icache when early patching nops.
Fixes: c97bf629963e ("riscv: Fix text patching when IPI are used")
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reported-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
Link: https://lore.kernel.org/r/20240523115134.70380-1-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include')
| -rw-r--r-- | arch/riscv/include/asm/cacheflush.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index dd8d07146116..ce79c558a4c8 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -13,6 +13,12 @@ static inline void local_flush_icache_all(void) asm volatile ("fence.i" ::: "memory"); } +static inline void local_flush_icache_range(unsigned long start, + unsigned long end) +{ + local_flush_icache_all(); +} + #define PG_dcache_clean PG_arch_1 static inline void flush_dcache_folio(struct folio *folio) |