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| author | Nam Cao <namcaov@gmail.com> | 2023-08-29 20:25:00 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-11-05 14:12:47 -0800 |
| commit | 8cb22bec142624d21bc85ff96b7bad10b6220e6a (patch) | |
| tree | 63df3a41abae887a5a13f894c81419c455cb4bb2 /arch/riscv | |
| parent | b701f9e726f0a30a94ea6af596b74c1f07b95b6b (diff) | |
| download | linux-8cb22bec142624d21bc85ff96b7bad10b6220e6a.tar.gz linux-8cb22bec142624d21bc85ff96b7bad10b6220e6a.tar.bz2 linux-8cb22bec142624d21bc85ff96b7bad10b6220e6a.zip | |
riscv: kprobes: allow writing to x0
Instructions can write to x0, so we should simulate these instructions
normally.
Currently, the kernel hangs if an instruction who writes to x0 is
simulated.
Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
Cc: stable@vger.kernel.org
Signed-off-by: Nam Cao <namcaov@gmail.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Acked-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20230829182500.61875-1-namcaov@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/kernel/probes/simulate-insn.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c index d3099d67816d..6c166029079c 100644 --- a/arch/riscv/kernel/probes/simulate-insn.c +++ b/arch/riscv/kernel/probes/simulate-insn.c @@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index, unsigned long val) { if (index == 0) - return false; + return true; else if (index <= 31) *((unsigned long *)regs + index) = val; else |