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authorAlexandre Ghiti <alex@ghiti.fr>2021-06-04 13:49:47 +0200
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-06-11 14:29:12 -0700
commit9b79878ced8f7ab85c57623f8b1f6882e484a316 (patch)
treeeaeb047176a053a6a11781283c420d8873959e2b /arch/riscv
parent8a4102a0cf07cc76a18f373f6b49485258cc6af4 (diff)
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riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED
Make the physical RAM base address available for all kernels, not only XIP kernels as it will allow to simplify address conversions macros. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/Kconfig6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a8ad8eb76120..0881abd43c20 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -490,13 +490,8 @@ config STACKPROTECTOR_PER_TASK
def_bool y
depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
-config PHYS_RAM_BASE_FIXED
- bool "Explicitly specified physical RAM address"
- default n
-
config PHYS_RAM_BASE
hex "Platform Physical RAM address"
- depends on PHYS_RAM_BASE_FIXED
default "0x80000000"
help
This is the physical address of RAM in the system. It has to be
@@ -509,7 +504,6 @@ config XIP_KERNEL
# This prevents XIP from being enabled by all{yes,mod}config, which
# fail to build since XIP doesn't support large kernels.
depends on !COMPILE_TEST
- select PHYS_RAM_BASE_FIXED
help
Execute-In-Place allows the kernel to run from non-volatile storage
directly addressable by the CPU, such as NOR flash. This saves RAM