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| author | Matt Fleming <matt@console-pimps.org> | 2009-12-13 14:38:50 +0000 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-12-17 14:31:20 +0900 |
| commit | 5d9b4b19f118abfb75e352841f7bf74580d7e427 (patch) | |
| tree | 5b9d0ec51bd12165d842d1d8a208e7568971757b /arch/sh/mm/fault_32.c | |
| parent | b73c806341cfc7492ede6a2ce713cb579547d0ab (diff) | |
| download | linux-5d9b4b19f118abfb75e352841f7bf74580d7e427.tar.gz linux-5d9b4b19f118abfb75e352841f7bf74580d7e427.tar.bz2 linux-5d9b4b19f118abfb75e352841f7bf74580d7e427.zip | |
sh: Definitions for 3-level page table layout
If using 64-bit PTEs and 4K pages then each page table has 512 entries
(as opposed to 1024 entries with 32-bit PTEs). Unlike MIPS, SH follows
the convention that all structures in the page table (pgd_t, pmd_t,
pgprot_t, etc) must be the same size. Therefore, 64-bit PTEs require
64-bit PGD entries, etc. Using 2-levels of page tables and 64-bit PTEs
it is only possible to map 1GB of virtual address space.
In order to map all 4GB of virtual address space we need to adopt a
3-level page table layout. This actually works out better for
CONFIG_SUPERH32 because we only waste 2 PGD entries on the P1 and P2
areas (which are untranslated) instead of 256.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/fault_32.c')
| -rw-r--r-- | arch/sh/mm/fault_32.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c index 47530104e0ad..28e22839c665 100644 --- a/arch/sh/mm/fault_32.c +++ b/arch/sh/mm/fault_32.c @@ -53,6 +53,9 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) if (!pud_present(*pud_k)) return NULL; + if (!pud_present(*pud)) + set_pud(pud, *pud_k); + pmd = pmd_offset(pud, address); pmd_k = pmd_offset(pud_k, address); if (!pmd_present(*pmd_k)) |