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| author | Gil Fine <gil.fine@linux.intel.com> | 2024-01-23 15:56:42 +0200 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2024-02-16 12:29:23 +0200 |
| commit | ccd845021147dc8257a05ed8f5a7f9c61a9101e3 (patch) | |
| tree | 32ff86ae22e3de5dbf126735b377f10ab9be3a2b /arch/um/scripts | |
| parent | 52a4490e89d7c4effe613d8dffd2ac0a2a786bd7 (diff) | |
| download | linux-ccd845021147dc8257a05ed8f5a7f9c61a9101e3.tar.gz linux-ccd845021147dc8257a05ed8f5a7f9c61a9101e3.tar.bz2 linux-ccd845021147dc8257a05ed8f5a7f9c61a9101e3.zip | |
thunderbolt: Calculate DisplayPort tunnel bandwidth after DPRX capabilities read
According to USB4 Connection Manager guide, after DisplayPort tunnel was
setup, the DPRX capabilities read is performed by the DPTX. According to
VESA spec, this shall be completed within 5 seconds after the DisplayPort
tunnel was setup. Hence, if the bit: DPRX Capabilities Read Done, was
not set to '1' by this time, we timeout and fail calculating DisplayPort
tunnel consumed bandwidth.
Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'arch/um/scripts')
0 files changed, 0 insertions, 0 deletions