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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-06 14:26:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-06 14:26:05 -0700 |
| commit | ffa009c366e33f3eae48bba2547051fe15795f64 (patch) | |
| tree | 78736a4ee7c16819830a32a313867e3a88ac6aff /arch/x86/Kconfig | |
| parent | 8e320d02718d2872d52ef88a69a493e420494269 (diff) | |
| parent | 46f06b72378d3187f0d12f7a60d020676bfbf332 (diff) | |
| download | linux-ffa009c366e33f3eae48bba2547051fe15795f64.tar.gz linux-ffa009c366e33f3eae48bba2547051fe15795f64.tar.bz2 linux-ffa009c366e33f3eae48bba2547051fe15795f64.zip | |
Merge git://git.infradead.org/iommu-2.6
* git://git.infradead.org/iommu-2.6:
drivers/pci/intr_remapping.c: include acpi.h
intel-iommu: Fix oops in device_to_iommu() when devices not found.
intel-iommu: Handle PCI domains appropriately.
intel-iommu: Fix device-to-iommu mapping for PCI-PCI bridges.
x2apic/intr-remap: decouple interrupt remapping from x2apic
x86, dmar: check if it's initialized before disable queue invalidation
intel-iommu: set compatibility format interrupt
Intel IOMMU Suspend/Resume Support - Interrupt Remapping
Intel IOMMU Suspend/Resume Support - Queued Invalidation
Intel IOMMU Suspend/Resume Support - DMAR
intel-iommu: Add for_each_iommu() and for_each_active_iommu() macros
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5b2196ab8168..4b3408206091 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -253,6 +253,7 @@ config SMP config X86_X2APIC bool "Support x2apic" depends on X86_LOCAL_APIC && X86_64 + select INTR_REMAP ---help--- This enables x2apic support on CPUs that have this feature. @@ -1881,7 +1882,6 @@ config DMAR_FLOPPY_WA config INTR_REMAP bool "Support for Interrupt Remapping (EXPERIMENTAL)" depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL - select X86_X2APIC ---help--- Supports Interrupt remapping for IO-APIC and MSI devices. To use x2apic mode in the CPU's which support x2APIC enhancements or |