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| author | Jacob Shin <jacob.w.shin@gmail.com> | 2014-05-29 17:26:50 +0200 |
|---|---|---|
| committer | Frederic Weisbecker <fweisbec@gmail.com> | 2014-12-03 15:14:26 +0100 |
| commit | d6d55f0b9d900673548515614b56ab55aa2c51f8 (patch) | |
| tree | 2c5d9bdff4444fec201a014e071e718a0f34d8aa /arch/x86/include/asm/hw_breakpoint.h | |
| parent | 4e6e311e596eadba30d4f56f64eae7d45611a01c (diff) | |
| download | linux-d6d55f0b9d900673548515614b56ab55aa2c51f8.tar.gz linux-d6d55f0b9d900673548515614b56ab55aa2c51f8.tar.bz2 linux-d6d55f0b9d900673548515614b56ab55aa2c51f8.zip | |
perf/x86/amd: AMD support for bp_len > HW_BREAKPOINT_LEN_8
Implement hardware breakpoint address mask for AMD Family 16h and
above processors. CPUID feature bit indicates hardware support for
DRn_ADDR_MASK MSRs. These masks further qualify DRn/DR7 hardware
breakpoint addresses to allow matching of larger addresses ranges.
Valuable advice and pseudo code from Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Jacob Shin <jacob.w.shin@gmail.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Reviewed-by: Oleg Nesterov <oleg@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: xiakaixu <xiakaixu@huawei.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/hw_breakpoint.h')
| -rw-r--r-- | arch/x86/include/asm/hw_breakpoint.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h index ef1c4d2d41ec..6c98be864a75 100644 --- a/arch/x86/include/asm/hw_breakpoint.h +++ b/arch/x86/include/asm/hw_breakpoint.h @@ -12,6 +12,7 @@ */ struct arch_hw_breakpoint { unsigned long address; + unsigned long mask; u8 len; u8 type; }; |