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authorDavid Woodhouse <dwmw@amazon.co.uk>2020-10-24 22:35:09 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-10-28 20:26:25 +0100
commitf598181acfb36f67e1de138cbe80a7db497f7d8c (patch)
treea8a024dadba1eae9af902105714a6e54aa91b7ac /arch/x86/include
parent8c44963b603db76e3e5f57d90d027657ba43c1fe (diff)
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x86/apic: Always provide irq_compose_msi_msg() method for vector domain
This shouldn't be dependent on PCI_MSI. HPET and I/O-APIC can deliver interrupts through MSI without having any PCI in the system at all. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201024213535.443185-10-dwmw2@infradead.org
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/apic.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index c1f64c6fa357..34cb3c159481 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -520,12 +520,10 @@ static inline void apic_smt_update(void) { }
#endif
struct msi_msg;
+struct irq_cfg;
-#ifdef CONFIG_PCI_MSI
-void x86_vector_msi_compose_msg(struct irq_data *data, struct msi_msg *msg);
-#else
-# define x86_vector_msi_compose_msg NULL
-#endif
+extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,
+ bool dmar);
extern void ioapic_zap_locks(void);