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authorMax Filippov <jcmvbkbc@gmail.com>2023-06-13 16:51:18 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2023-06-13 21:56:27 -0700
commitf29cf77609cc401d28e2e7ec5c57d9d178ef347d (patch)
tree54198dcf0f6c2fd2d1720845d9b1f2302211cb55 /arch/xtensa/kernel/setup.c
parent651d4aff6892f630d399201f9ce94e240d932520 (diff)
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xtensa: add load/store exception handler
Memory attached to instruction bus of the xtensa CPU is only accessible for a limited subset of opcodes. Other opcodes generate an exception with the load/store error cause code. This property complicates use of such systems. Provide a handler that recognizes and transparently fixes such exceptions. The following opcodes are recognized when used outside of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/setup.c')
-rw-r--r--arch/xtensa/kernel/setup.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 09ab4d83faf8..aba3ff4e60d8 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -245,7 +245,8 @@ void __init init_arch(bp_tag_t *bp_start)
{
/* Initialize basic exception handling if configuration may need it */
- if (IS_ENABLED(CONFIG_KASAN))
+ if (IS_ENABLED(CONFIG_KASAN) ||
+ IS_ENABLED(CONFIG_XTENSA_LOAD_STORE))
early_trap_init();
/* Initialize MMU. */