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authorLinus Torvalds <torvalds@linux-foundation.org>2013-09-25 14:56:39 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-25 14:56:39 -0700
commitb4820416dd92bc3df33f261c60ec21b2c4481bec (patch)
tree94ac18c7604b5d10d13caad6fa8a0488960da4a9 /arch
parent06367d58f487a592de50e6e2327371c5e3b6188f (diff)
parent55c25c2f14496badefd780a9f179442756216b67 (diff)
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Merge git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: - Fix a comment - A small cleanup the main purpose of which is to work around an internal compiler error bug in certain Codesource toolchains. * git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: mm: Move some checks out of 'for' loop in DMA operations MIPS: cpu-features.h: s/MIPS53/MIPS64/
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/cpu-features.h2
-rw-r--r--arch/mips/mm/dma-default.c12
2 files changed, 5 insertions, 9 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 51680d15ca8e..d445d060e346 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -187,7 +187,7 @@
/*
* MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
- * pre-MIPS32/MIPS53 processors have CLO, CLZ. The IDT RC64574 is 64-bit and
+ * pre-MIPS32/MIPS64 processors have CLO, CLZ. The IDT RC64574 is 64-bit and
* has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels
* cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
*/
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index f25a7e9f8cbc..5f8b95512580 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -308,12 +308,10 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
{
int i;
- /* Make sure that gcc doesn't leave the empty loop body. */
- for (i = 0; i < nelems; i++, sg++) {
- if (cpu_needs_post_dma_flush(dev))
+ if (cpu_needs_post_dma_flush(dev))
+ for (i = 0; i < nelems; i++, sg++)
__dma_sync(sg_page(sg), sg->offset, sg->length,
direction);
- }
}
static void mips_dma_sync_sg_for_device(struct device *dev,
@@ -321,12 +319,10 @@ static void mips_dma_sync_sg_for_device(struct device *dev,
{
int i;
- /* Make sure that gcc doesn't leave the empty loop body. */
- for (i = 0; i < nelems; i++, sg++) {
- if (!plat_device_is_coherent(dev))
+ if (!plat_device_is_coherent(dev))
+ for (i = 0; i < nelems; i++, sg++)
__dma_sync(sg_page(sg), sg->offset, sg->length,
direction);
- }
}
int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)