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| author | Johan Jonker <jbx6244@gmail.com> | 2020-04-25 16:38:37 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2020-04-27 21:31:54 +0200 |
| commit | c604fd810bda667bdc20b2c041917baa7803e0fb (patch) | |
| tree | b6299050610d7aba39af3c6c72abdfe8fd7c2e62 /arch | |
| parent | c617ed88502d0b05149e7f32f3b3fd8a0663f7e2 (diff) | |
| download | linux-c604fd810bda667bdc20b2c041917baa7803e0fb.tar.gz linux-c604fd810bda667bdc20b2c041917baa7803e0fb.tar.bz2 linux-c604fd810bda667bdc20b2c041917baa7803e0fb.zip | |
arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu node
Dts files with Rockchip rk3399 'gpu' nodes were manually verified.
In order to automate this process arm,mali-midgard.txt
has been converted to yaml. In the new setup dtbs_check with
arm,mali-midgard.yaml expects interrupts and interrupt-names values
in the same order. Fix this for rk3399.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/
arm,mali-midgard.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 90c27723cec5..1448f358ed0a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1881,10 +1881,10 @@ gpu: gpu@ff9a0000 { compatible = "rockchip,rk3399-mali", "arm,mali-t860"; reg = <0x0 0xff9a0000 0x0 0x10000>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>; - interrupt-names = "gpu", "job", "mmu"; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "job", "mmu", "gpu"; clocks = <&cru ACLK_GPU>; #cooling-cells = <2>; power-domains = <&power RK3399_PD_GPU>; |