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authorStephen Warren <swarren@nvidia.com>2012-08-01 13:57:24 -0600
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-08-04 12:13:54 +0100
commit40052ca0c243d101cfadd65936f60ef81df10b02 (patch)
tree47857240772f3cb43d0d0a19998887485af017e7 /drivers/base/regmap
parent685879f4b2036e58c1a0cdaaee2b155d3c965461 (diff)
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regmap: irq: initialize all irqs to wake disabled
The kerneldoc for irq_set_irq_wake() says: Enable/disable power management wakeup mode, which is disabled by default. regmap_irq_set_wake() clears bits to enable wake for an interrupt, and sets bits to disable wake. Hence, we should set all bits in wake_buf initially, to mirror the expected disabled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/base/regmap')
-rw-r--r--drivers/base/regmap/regmap-irq.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 9a6649c82daa..6f8f0c1e550f 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -322,6 +322,22 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
}
}
+ /* Wake is disabled by default */
+ if (d->wake_buf) {
+ for (i = 0; i < chip->num_regs; i++) {
+ d->wake_buf[i] = d->mask_buf_def[i];
+ reg = chip->wake_base +
+ (i * map->reg_stride * d->irq_reg_stride);
+ ret = regmap_update_bits(map, reg, d->wake_buf[i],
+ d->wake_buf[i]);
+ if (ret != 0) {
+ dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
+ reg, ret);
+ goto err_alloc;
+ }
+ }
+ }
+
if (irq_base)
d->domain = irq_domain_add_legacy(map->dev->of_node,
chip->num_irqs, irq_base, 0,