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authorDylan Reid <dgreid@chromium.org>2014-01-24 15:40:39 -0800
committerMark Brown <broonie@linaro.org>2014-01-27 18:25:11 +0000
commit78ba73eecd2256790926859849801c0446766c0a (patch)
treebb8876ab01f0ab70ec7d754cf131fcc7a8384ced /drivers/base
parent86776fc174973e556be7d668763f509a81124f8b (diff)
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regmap: cache: Handle stride > 1 in sync_block_raw_flush
regcache_sync_block_raw_flush takes the address of the base register and the address of one past the last register to write to. "count" is the number of registers in the range, not the number of bytes, it should be (end addr - start addr) / stride. Without accounting for strides greater than one, registers past the end might be synced or the writeable_reg callback at the beginning of _regmap_raw_write will fail and nothing will be written. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/base')
-rw-r--r--drivers/base/regmap/regcache.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index d4dd77134814..dd56177b7010 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -636,10 +636,10 @@ static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
if (*data == NULL)
return 0;
- count = cur - base;
+ count = (cur - base) / map->reg_stride;
dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
- count * val_bytes, count, base, cur - 1);
+ count * val_bytes, count, base, cur - map->reg_stride);
map->cache_bypass = 1;