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author | Anson Huang <anson.huang@nxp.com> | 2019-05-15 01:09:30 +0000 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2019-05-22 17:00:57 +0800 |
commit | 3d6c33cb904dae4b1a9bf89725fcf38daa7fa0e1 (patch) | |
tree | c4a5ec982cd7001bd74a0e671ed134bae8bceba7 /drivers/clk/imx/clk-imx8mq.c | |
parent | 4ef69160b3ed62379ef853c512d3785bf2ea57e6 (diff) | |
download | linux-3d6c33cb904dae4b1a9bf89725fcf38daa7fa0e1.tar.gz linux-3d6c33cb904dae4b1a9bf89725fcf38daa7fa0e1.tar.bz2 linux-3d6c33cb904dae4b1a9bf89725fcf38daa7fa0e1.zip |
clk: imx8mq: add SNVS clock to clock tree
i.MX8MQ has clock gate for SNVS module, add it into clock tree
for SNVS RTC driver to manage.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-imx8mq.c')
-rw-r--r-- | drivers/clk/imx/clk-imx8mq.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index daf1841b2adb..24c34646849f 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -507,6 +507,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev) clks[IMX8MQ_CLK_SAI5_IPG] = imx_clk_gate2_shared2("sai5_ipg_clk", "ipg_audio_root", base + 0x4370, 0, &share_count_sai5); clks[IMX8MQ_CLK_SAI6_ROOT] = imx_clk_gate2_shared2("sai6_root_clk", "sai6", base + 0x4380, 0, &share_count_sai6); clks[IMX8MQ_CLK_SAI6_IPG] = imx_clk_gate2_shared2("sai6_ipg_clk", "ipg_audio_root", base + 0x4380, 0, &share_count_sai6); + clks[IMX8MQ_CLK_SNVS_ROOT] = imx_clk_gate4("snvs_root_clk", "ipg_root", base + 0x4470, 0); clks[IMX8MQ_CLK_UART1_ROOT] = imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0); clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0); clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0); |