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author | Francesco Dolcini <francesco.dolcini@toradex.com> | 2023-07-29 00:26:39 +0200 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2023-08-04 18:10:21 -0700 |
commit | dd1df82ce27a05c7cf0bc5387978412e35fbdaaf (patch) | |
tree | ee7ef3fb933f0a6a541202afe81ee1a6927f70f3 /drivers/clk/keystone | |
parent | ae9b14582ad03abb3db66ba3f8dc5ca443ff54a1 (diff) | |
download | linux-dd1df82ce27a05c7cf0bc5387978412e35fbdaaf.tar.gz linux-dd1df82ce27a05c7cf0bc5387978412e35fbdaaf.tar.bz2 linux-dd1df82ce27a05c7cf0bc5387978412e35fbdaaf.zip |
clk: keystone: syscon-clk: Fix audio refclk
Audio REFCLK's are not working correctly, trying to use them lead to the
following errors:
[ 6.575277] of_clk_hw_onecell_get: invalid index 4294934528
[ 6.581515] wm8904 1-001a: Failed to get MCLK
[ 6.586290] wm8904: probe of 1-001a failed with error -2
The issue is that Audio REFCLK has #clock-cells = 0 [1], while the driver
is registering those clocks assuming they have one cells. Fix this by
registering the clock with of_clk_hw_simple_get() when there is only one
instance, e.g. "audio_refclk".
[1] Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml
Fixes: 6acab96ee337 ("clk: keystone: syscon-clk: Add support for audio refclk")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230728222639.110409-1-francesco@dolcini.it
[sboyd@kernel.org: Simplify if-return-else logic]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/keystone')
-rw-r--r-- | drivers/clk/keystone/syscon-clk.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/keystone/syscon-clk.c b/drivers/clk/keystone/syscon-clk.c index d33f74119488..935d9a2d8c2b 100644 --- a/drivers/clk/keystone/syscon-clk.c +++ b/drivers/clk/keystone/syscon-clk.c @@ -151,8 +151,10 @@ static int ti_syscon_gate_clk_probe(struct platform_device *pdev) data[i].name); } - return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, - hw_data); + if (num_clks == 1) + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, + hw_data->hws[0]); + return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data); } #define TI_SYSCON_CLK_GATE(_name, _offset, _bit_idx) \ |