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author | Stephen Boyd <sboyd@codeaurora.org> | 2016-05-02 17:03:08 -0700 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-05-02 17:03:08 -0700 |
commit | 51de8760fb1d4dcfb52dec5aa85b2eb6471808a3 (patch) | |
tree | 1c4db35c028aaa5de6dc00c2df3cc78ecc7567dc /drivers/clk/sunxi/Makefile | |
parent | 5bc753249719e88c195e84bbf8eca6530507d403 (diff) | |
parent | ff2bb89335daec6053b5ac778369f7f72b931142 (diff) | |
download | linux-51de8760fb1d4dcfb52dec5aa85b2eb6471808a3.tar.gz linux-51de8760fb1d4dcfb52dec5aa85b2eb6471808a3.tar.bz2 linux-51de8760fb1d4dcfb52dec5aa85b2eb6471808a3.zip |
Merge tag 'sunxi-clocks-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock driver updates from Maxime Ripard:
As usual, a bunch of clocks patches for 4.7, mostly fixes and cleanups, and
display-related clocks.
* tag 'sunxi-clocks-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi: Let divs clocks read the base factor clock name from devicetree
clk: sunxi: Add TCON channel1 clock
clk: sunxi: Add PLL3 clock
dt-bindings: clk: sun5i: add DRAM gates compatible
clk: sunxi: Use resource_size
clk: sunxi: Add sun6i/8i display support
clk: sunxi: mod1 clock should modify it's parent
Diffstat (limited to 'drivers/clk/sunxi/Makefile')
-rw-r--r-- | drivers/clk/sunxi/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 3fd7901d48e4..2d77407a0037 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -11,6 +11,8 @@ obj-y += clk-a10-ve.o obj-y += clk-a20-gmac.o obj-y += clk-mod0.o obj-y += clk-simple-gates.o +obj-y += clk-sun4i-pll3.o +obj-y += clk-sun4i-tcon-ch1.o obj-y += clk-sun8i-bus-gates.o obj-y += clk-sun8i-mbus.o obj-y += clk-sun9i-core.o |