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authorSam Shih <sam.shih@mediatek.com>2022-05-09 17:09:39 +0800
committerStephen Boyd <sboyd@kernel.org>2022-05-18 17:28:01 -0700
commit544e9ec70f9335b07498319a2dacc6732a73850b (patch)
tree52e0176b314d4228550a1d707fc2bc9d6fbe05e6 /drivers/clk
parenta677bdf8b6aeea56bd545f7d7c1dcf18d0538426 (diff)
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clk: mediatek: update compatible string for MT7986 ethsys
Update compatible string of mt7986 ethsys clock driver to fit the devicetree bindings document. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20220509090939.845-2-sam.shih@mediatek.com Fixes: ec97d23c8e22 ("clk: mediatek: add mt7986 clock support") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/mediatek/clk-mt7986-eth.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/mediatek/clk-mt7986-eth.c b/drivers/clk/mediatek/clk-mt7986-eth.c
index 495d023ccad7..ed2e7b200987 100644
--- a/drivers/clk/mediatek/clk-mt7986-eth.c
+++ b/drivers/clk/mediatek/clk-mt7986-eth.c
@@ -129,4 +129,4 @@ static void __init mtk_ethsys_init(struct device_node *node)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
}
-CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt7986-ethsys_ck", mtk_ethsys_init);
+CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt7986-ethsys", mtk_ethsys_init);