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author | Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> | 2017-07-26 20:23:39 +0900 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-08-17 09:22:26 +0200 |
commit | c29f82951b974f27e0bc4ce2525db164f86f2e4d (patch) | |
tree | bfcee3b12c261f0c751a1c401b5f3efa20d15aef /drivers/clk | |
parent | 311accb64570db45604dd8929af6f7da735835c9 (diff) | |
download | linux-c29f82951b974f27e0bc4ce2525db164f86f2e4d.tar.gz linux-c29f82951b974f27e0bc4ce2525db164f86f2e4d.tar.bz2 linux-c29f82951b974f27e0bc4ce2525db164f86f2e4d.zip |
clk: renesas: r8a7796: Add USB3.0 clock
This patch adds USB3.0-IF0 clock for R8A7796 SoC.
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 22ba3c497aba..e5e7fb212288 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -138,6 +138,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), DEF_MOD("pcie1", 318, R8A7796_CLK_S3D1), DEF_MOD("pcie0", 319, R8A7796_CLK_S3D1), + DEF_MOD("usb3-if0", 328, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac0", 330, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac1", 331, R8A7796_CLK_S3D1), DEF_MOD("rwdt", 402, R8A7796_CLK_R), |