diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2020-02-21 14:59:36 +0800 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2020-02-24 15:49:25 +0800 |
commit | eeca5721baeb11935dac85e71f7fd5a62919ed85 (patch) | |
tree | f50829115bda52e3811386c7b353a1688aed0850 /drivers/clk | |
parent | 530cf8d49f2a650625eee6ce28793bd7974e14bd (diff) | |
download | linux-eeca5721baeb11935dac85e71f7fd5a62919ed85.tar.gz linux-eeca5721baeb11935dac85e71f7fd5a62919ed85.tar.bz2 linux-eeca5721baeb11935dac85e71f7fd5a62919ed85.zip |
clk: imx: clk-sscg-pll: Drop unnecessary initialization
No need to initialize 'ret' in many functions, as it will get
the return value from function call, so remove the initializtion
of 'ret'.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/imx/clk-sscg-pll.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/clk/imx/clk-sscg-pll.c b/drivers/clk/imx/clk-sscg-pll.c index acd1b9002be6..d4a2be16d132 100644 --- a/drivers/clk/imx/clk-sscg-pll.c +++ b/drivers/clk/imx/clk-sscg-pll.c @@ -195,10 +195,10 @@ static int clk_sscg_pll2_find_setup(struct clk_sscg_pll_setup *setup, uint64_t ref) { - int ret = -EINVAL; + int ret; if (ref < PLL_STAGE1_MIN_FREQ || ref > PLL_STAGE1_MAX_FREQ) - return ret; + return -EINVAL; temp_setup->vco1 = ref; @@ -254,10 +254,10 @@ static int clk_sscg_pll1_find_setup(struct clk_sscg_pll_setup *setup, uint64_t ref) { - int ret = -EINVAL; + int ret; if (ref < PLL_REF_MIN_FREQ || ref > PLL_REF_MAX_FREQ) - return ret; + return -EINVAL; temp_setup->ref = ref; @@ -428,7 +428,7 @@ static int __clk_sscg_pll_determine_rate(struct clk_hw *hw, struct clk_sscg_pll_setup *setup = &pll->setup; struct clk_hw *parent_hw = NULL; int bypass_parent_index; - int ret = -EINVAL; + int ret; req->max_rate = max; req->min_rate = min; @@ -467,10 +467,10 @@ static int clk_sscg_pll_determine_rate(struct clk_hw *hw, uint64_t rate = req->rate; uint64_t min = req->min_rate; uint64_t max = req->max_rate; - int ret = -EINVAL; + int ret; if (rate < PLL_OUT_MIN_FREQ || rate > PLL_OUT_MAX_FREQ) - return ret; + return -EINVAL; ret = __clk_sscg_pll_determine_rate(hw, req, req->rate, req->rate, rate, PLL_BYPASS2); |