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authorRick Chen <rickchen36@gmail.com>2017-12-11 15:53:15 +0800
committerGreentime Hu <greentime@andestech.com>2018-02-22 10:44:36 +0800
commit35dbb74aa752cff90e8dac1a24ed2a452aed0251 (patch)
treeabc5f51bd1582b665b0b7ec5d8b180b61762ff66 /drivers/clocksource/Makefile
parenteac8173e7b99b215a386391dc95f5e4d7e4d7085 (diff)
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clocksource/drivers/atcpit100: Add andestech atcpit100 timer
ATCPIT100 is often used on the Andes architecture, This timer provide 4 PIT channels. Each PIT channel is a multi-function timer, can be configured as 32,16,8 bit timers or PWM as well. For system timer it will set channel 1 32-bit timer0 as clock source and count downwards until underflow and restart again. It also set channel 0 32-bit timer0 as clock event and count downwards until condition match. It will generate an interrupt for handling periodically. Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Add andestech atcpit100 timer
Diffstat (limited to 'drivers/clocksource/Makefile')
-rw-r--r--drivers/clocksource/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index d6dec4489d66..a79523b22e52 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -76,3 +76,4 @@ obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o
obj-$(CONFIG_H8300_TPU) += h8300_tpu.o
obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o
obj-$(CONFIG_X86_NUMACHIP) += numachip.o
+obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o