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author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-02-13 12:27:23 +0100 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-02-13 12:27:23 +0100 |
commit | b53c7348caf4de8ee447f9e6c2a1eb480199c042 (patch) | |
tree | 7bef5b2c91add03583fe84ba812a17eef2efb078 /drivers/cpufreq/qcom-cpufreq-hw.c | |
parent | 263abfe74b5f1058887b14e7668b0d737e040e42 (diff) | |
parent | af816ddfbdf049dfce251513af4b5dc903c9764c (diff) | |
download | linux-b53c7348caf4de8ee447f9e6c2a1eb480199c042.tar.gz linux-b53c7348caf4de8ee447f9e6c2a1eb480199c042.tar.bz2 linux-b53c7348caf4de8ee447f9e6c2a1eb480199c042.zip |
Merge branch 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm into pm-cpufreq
Pull ARM cpufreq driver updates for v5.1 from Viresh Kumar:
"This pull request contains following changes:
- New Armada 8k cpufreq driver (Gregory CLEMENT).
- qcom driver cleanups (Amit Kucheria, Taniya Das, Yangtao Li).
- s5pv210 driver cleanup (Paweł Chmiel).
- tegra driver cleanup (Yangtao Li).
- Minor update to MAINTAINERS file (Baruch Siach)."
* 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
cpufreq: qcom-hw: Register an Energy Model
cpufreq: qcom: Read voltage LUT and populate OPP
cpufreq: qcom-hw: Move to device_initcall
cpufreq: tegra124: add missing of_node_put()
cpufreq: qcom-kryo: make some variables static
MAINTAINERS: Update the active pm tree for ARM
cpufreq: ap806: add cpufreq driver for Armada 8K
MAINTAINERS: add new entries for Armada 8K cpufreq driver
cpufreq: s5pv210: Defer probe if getting regulators fail
MAINTAINERS: use common indentation
PM / OPP: Introduce a power estimation helper
PM / OPP: Remove unused parameter of _generic_set_opp_clk_only()
Diffstat (limited to 'drivers/cpufreq/qcom-cpufreq-hw.c')
-rw-r--r-- | drivers/cpufreq/qcom-cpufreq-hw.c | 50 |
1 files changed, 40 insertions, 10 deletions
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index c88b51304d89..4b0b50403901 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -10,18 +10,21 @@ #include <linux/module.h> #include <linux/of_address.h> #include <linux/of_platform.h> +#include <linux/pm_opp.h> #include <linux/slab.h> #define LUT_MAX_ENTRIES 40U #define LUT_SRC GENMASK(31, 30) #define LUT_L_VAL GENMASK(7, 0) #define LUT_CORE_COUNT GENMASK(18, 16) +#define LUT_VOLT GENMASK(11, 0) #define LUT_ROW_SIZE 32 #define CLK_HW_DIV 2 /* Register offsets */ #define REG_ENABLE 0x0 -#define REG_LUT_TABLE 0x110 +#define REG_FREQ_LUT 0x110 +#define REG_VOLT_LUT 0x114 #define REG_PERF_STATE 0x920 static unsigned long cpu_hw_rate, xo_rate; @@ -70,11 +73,12 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy, return policy->freq_table[index].frequency; } -static int qcom_cpufreq_hw_read_lut(struct device *dev, +static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, struct cpufreq_policy *policy, void __iomem *base) { u32 data, src, lval, i, core_count, prev_cc = 0, prev_freq = 0, freq; + u32 volt; unsigned int max_cores = cpumask_weight(policy->cpus); struct cpufreq_frequency_table *table; @@ -83,23 +87,28 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, return -ENOMEM; for (i = 0; i < LUT_MAX_ENTRIES; i++) { - data = readl_relaxed(base + REG_LUT_TABLE + i * LUT_ROW_SIZE); + data = readl_relaxed(base + REG_FREQ_LUT + + i * LUT_ROW_SIZE); src = FIELD_GET(LUT_SRC, data); lval = FIELD_GET(LUT_L_VAL, data); core_count = FIELD_GET(LUT_CORE_COUNT, data); + data = readl_relaxed(base + REG_VOLT_LUT + + i * LUT_ROW_SIZE); + volt = FIELD_GET(LUT_VOLT, data) * 1000; + if (src) freq = xo_rate * lval / 1000; else freq = cpu_hw_rate / 1000; - /* Ignore boosts in the middle of the table */ - if (core_count != max_cores) { - table[i].frequency = CPUFREQ_ENTRY_INVALID; - } else { + if (freq != prev_freq && core_count == max_cores) { table[i].frequency = freq; - dev_dbg(dev, "index=%d freq=%d, core_count %d\n", i, + dev_pm_opp_add(cpu_dev, freq * 1000, volt); + dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i, freq, core_count); + } else { + table[i].frequency = CPUFREQ_ENTRY_INVALID; } /* @@ -116,6 +125,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, if (prev_cc != max_cores) { prev->frequency = prev_freq; prev->flags = CPUFREQ_BOOST_FREQ; + dev_pm_opp_add(cpu_dev, prev_freq * 1000, volt); } break; @@ -127,6 +137,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev, table[i].frequency = CPUFREQ_TABLE_END; policy->freq_table = table; + dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); return 0; } @@ -159,10 +170,18 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) struct device *dev = &global_pdev->dev; struct of_phandle_args args; struct device_node *cpu_np; + struct device *cpu_dev; struct resource *res; void __iomem *base; int ret, index; + cpu_dev = get_cpu_device(policy->cpu); + if (!cpu_dev) { + pr_err("%s: failed to get cpu%d device\n", __func__, + policy->cpu); + return -ENODEV; + } + cpu_np = of_cpu_device_node_get(policy->cpu); if (!cpu_np) return -EINVAL; @@ -199,12 +218,21 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) policy->driver_data = base + REG_PERF_STATE; - ret = qcom_cpufreq_hw_read_lut(dev, policy, base); + ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy, base); if (ret) { dev_err(dev, "Domain-%d failed to read LUT\n", index); goto error; } + ret = dev_pm_opp_get_opp_count(cpu_dev); + if (ret <= 0) { + dev_err(cpu_dev, "Failed to add OPPs\n"); + ret = -ENODEV; + goto error; + } + + dev_pm_opp_of_register_em(policy->cpus); + policy->fast_switch_possible = true; return 0; @@ -215,8 +243,10 @@ error: static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) { + struct device *cpu_dev = get_cpu_device(policy->cpu); void __iomem *base = policy->driver_data - REG_PERF_STATE; + dev_pm_opp_remove_all_dynamic(cpu_dev); kfree(policy->freq_table); devm_iounmap(&global_pdev->dev, base); @@ -297,7 +327,7 @@ static int __init qcom_cpufreq_hw_init(void) { return platform_driver_register(&qcom_cpufreq_hw_driver); } -subsys_initcall(qcom_cpufreq_hw_init); +device_initcall(qcom_cpufreq_hw_init); static void __exit qcom_cpufreq_hw_exit(void) { |