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author | Giovanni Cabiddu <giovanni.cabiddu@intel.com> | 2021-12-16 09:13:13 +0000 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2021-12-24 14:18:23 +1100 |
commit | cfe4894eccdc7fa5cd35bf34e918614d06ecce38 (patch) | |
tree | 2d849a28df19e1b372c908774a06a05870ba91b5 /drivers/crypto/qat/qat_dh895xcc | |
parent | 547bde7bd4ecd78f36f98744e6c9a0999e52da5a (diff) | |
download | linux-cfe4894eccdc7fa5cd35bf34e918614d06ecce38.tar.gz linux-cfe4894eccdc7fa5cd35bf34e918614d06ecce38.tar.bz2 linux-cfe4894eccdc7fa5cd35bf34e918614d06ecce38.zip |
crypto: qat - set COMPRESSION capability for QAT GEN2
Enhance the device capability detection for QAT GEN2 devices to detect if
a device supports the compression service.
This is done by checking both the fuse and the strap registers for c62x
and c3xxx and only the fuse register for dh895xcc.
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat/qat_dh895xcc')
-rw-r--r-- | drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c index 27d4cab65dd8..2d18279191d7 100644 --- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c @@ -69,6 +69,8 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev) capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION; + if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE) + capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION; return capabilities; } |