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| author | Rabin Vincent <rabin.vincent@stericsson.com> | 2012-05-17 13:47:38 +0530 |
|---|---|---|
| committer | Fabio Baltieri <fabio.baltieri@linaro.org> | 2013-01-14 10:50:37 +0100 |
| commit | ccc3d6976433aa67131117fccd2b5143d82a6f48 (patch) | |
| tree | 5ef904efcb61988c273f4987cd2bc86c772cdec9 /drivers/dma/ste_dma40.c | |
| parent | 42365cf0fa19473dde5fe226b0e7e9ab8ea18af8 (diff) | |
| download | linux-ccc3d6976433aa67131117fccd2b5143d82a6f48.tar.gz linux-ccc3d6976433aa67131117fccd2b5143d82a6f48.tar.bz2 linux-ccc3d6976433aa67131117fccd2b5143d82a6f48.zip | |
dmaengine: ste_dma40: don't allow high priority dest event lines
Hardware bug: when a logical channel is triggerred by a high priority
destination event line, an extra packet transaction is generated in case
of important data write response latency on previous logical channel A
and if the source transfer of current logical channel B is already
completed and if no other channel with a higher priority than B is
waiting for execution.
Software workaround: do not set the high priority level for the
destination event lines that trigger logical channels.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Diffstat (limited to 'drivers/dma/ste_dma40.c')
| -rw-r--r-- | drivers/dma/ste_dma40.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 760576b85641..9f8964a0a287 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2180,11 +2180,24 @@ static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src) { bool realtime = d40c->dma_cfg.realtime; bool highprio = d40c->dma_cfg.high_priority; - u32 prioreg = highprio ? D40_DREG_PSEG1 : D40_DREG_PCEG1; u32 rtreg = realtime ? D40_DREG_RSEG1 : D40_DREG_RCEG1; u32 event = D40_TYPE_TO_EVENT(dev_type); u32 group = D40_TYPE_TO_GROUP(dev_type); u32 bit = 1 << event; + u32 prioreg; + + /* + * Due to a hardware bug, in some cases a logical channel triggered by + * a high priority destination event line can generate extra packet + * transactions. + * + * The workaround is to not set the high priority level for the + * destination event lines that trigger logical channels. + */ + if (!src && chan_is_logical(d40c)) + highprio = false; + + prioreg = highprio ? D40_DREG_PSEG1 : D40_DREG_PCEG1; /* Destination event lines are stored in the upper halfword */ if (!src) |