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author | Yauhen Kharuzhy <jekhor@gmail.com> | 2019-03-03 23:16:12 +0300 |
---|---|---|
committer | Chanwoo Choi <cw00.choi@samsung.com> | 2019-04-05 10:21:41 +0900 |
commit | 3137301b6d970219706d887eb6bdcabbf54f1f3b (patch) | |
tree | 771dcc93b295d1c7b6d1d2262711e1aa9fee7659 /drivers/extcon/extcon-intel-cht-wc.c | |
parent | 86baf800de84eb89615c138d368b14bff5ee7d8a (diff) | |
download | linux-3137301b6d970219706d887eb6bdcabbf54f1f3b.tar.gz linux-3137301b6d970219706d887eb6bdcabbf54f1f3b.tar.bz2 linux-3137301b6d970219706d887eb6bdcabbf54f1f3b.zip |
extcon: intel-cht-wc: Make charger detection co-existed with OTG host mode
Whiskey Cove Cherry Trail PMIC requires disabling OTG host mode before
of charger detection procedure. Do this by manipulationg of CHGRCTRL1
register.
Source: APCI DSDT code of Lenovo Yoga Book YB1-X91L and open-sourced
Intel's drivers.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'drivers/extcon/extcon-intel-cht-wc.c')
-rw-r--r-- | drivers/extcon/extcon-intel-cht-wc.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c index 5ef215297101..8d20e913536f 100644 --- a/drivers/extcon/extcon-intel-cht-wc.c +++ b/drivers/extcon/extcon-intel-cht-wc.c @@ -29,7 +29,15 @@ #define CHT_WC_CHGRCTRL0_DBPOFF BIT(6) #define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7) -#define CHT_WC_CHGRCTRL1 0x5e17 +#define CHT_WC_CHGRCTRL1 0x5e17 +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_100 BIT(0) +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_150 BIT(1) +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_500 BIT(2) +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_900 BIT(3) +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500 BIT(4) +#define CHT_WC_CHGRCTRL1_FTEMP_EVENT BIT(5) +#define CHT_WC_CHGRCTRL1_OTGMODE BIT(6) +#define CHT_WC_CHGRCTRL1_DBPEN BIT(7) #define CHT_WC_USBSRC 0x5e29 #define CHT_WC_USBSRC_STS_MASK GENMASK(1, 0) @@ -198,6 +206,18 @@ static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext, dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret); } +static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext, + bool enable) +{ + unsigned int val = enable ? CHT_WC_CHGRCTRL1_OTGMODE : 0; + int ret; + + ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL1, + CHT_WC_CHGRCTRL1_OTGMODE, val); + if (ret) + dev_err(ext->dev, "Error updating CHGRCTRL1 reg: %d\n", ret); +} + /* Small helper to sync EXTCON_CHG_USB_SDP and EXTCON_USB state */ static void cht_wc_extcon_set_state(struct cht_wc_extcon_data *ext, unsigned int cable, bool state) @@ -222,10 +242,14 @@ static void cht_wc_extcon_pwrsrc_event(struct cht_wc_extcon_data *ext) id = cht_wc_extcon_get_id(ext, pwrsrc_sts); if (id == USB_ID_GND) { + cht_wc_extcon_set_otgmode(ext, true); + /* The 5v boost causes a false VBUS / SDP detect, skip */ goto charger_det_done; } + cht_wc_extcon_set_otgmode(ext, false); + /* Plugged into a host/charger or not connected? */ if (!(pwrsrc_sts & CHT_WC_PWRSRC_VBUS)) { /* Route D+ and D- to PMIC for future charger detection */ |