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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-08-27 18:35:54 +0300 |
|---|---|---|
| committer | Chanwoo Choi <cw00.choi@samsung.com> | 2018-08-28 11:21:15 +0900 |
| commit | 001d3eccf9fc9b598b155f94b5f727ee825252d9 (patch) | |
| tree | 261fe1606cfbe7bfe128c3eac6930995fa57205c /drivers/extcon | |
| parent | 962341b54b99965ebec5f70c8d39f1c382eea833 (diff) | |
| download | linux-001d3eccf9fc9b598b155f94b5f727ee825252d9.tar.gz linux-001d3eccf9fc9b598b155f94b5f727ee825252d9.tar.bz2 linux-001d3eccf9fc9b598b155f94b5f727ee825252d9.zip | |
extcon: cht-wc: Fix definition names according to spec
There is no suffix MASK in the spec and other small spelling fixes.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'drivers/extcon')
| -rw-r--r-- | drivers/extcon/extcon-intel-cht-wc.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c index bdb67878179e..71b1126dbb0b 100644 --- a/drivers/extcon/extcon-intel-cht-wc.c +++ b/drivers/extcon/extcon-intel-cht-wc.c @@ -32,10 +32,10 @@ #define CHT_WC_CHGRCTRL0_EMRGCHREN BIT(1) #define CHT_WC_CHGRCTRL0_EXTCHRDIS BIT(2) #define CHT_WC_CHGRCTRL0_SWCONTROL BIT(3) -#define CHT_WC_CHGRCTRL0_TTLCK_MASK BIT(4) -#define CHT_WC_CHGRCTRL0_CCSM_OFF_MASK BIT(5) -#define CHT_WC_CHGRCTRL0_DBPOFF_MASK BIT(6) -#define CHT_WC_CHGRCTRL0_WDT_NOKICK BIT(7) +#define CHT_WC_CHGRCTRL0_TTLCK BIT(4) +#define CHT_WC_CHGRCTRL0_CCSM_OFF BIT(5) +#define CHT_WC_CHGRCTRL0_DBPOFF BIT(6) +#define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7) #define CHT_WC_CHGRCTRL1 0x5e17 @@ -52,7 +52,7 @@ #define CHT_WC_USBSRC_TYPE_ACA 4 #define CHT_WC_USBSRC_TYPE_SE1 5 #define CHT_WC_USBSRC_TYPE_MHL 6 -#define CHT_WC_USBSRC_TYPE_FLOAT_DP_DN 7 +#define CHT_WC_USBSRC_TYPE_FLOATING 7 #define CHT_WC_USBSRC_TYPE_OTHER 8 #define CHT_WC_USBSRC_TYPE_DCP_EXTPHY 9 @@ -61,7 +61,7 @@ #define CHT_WC_PWRSRC_STS 0x6e1e #define CHT_WC_PWRSRC_VBUS BIT(0) #define CHT_WC_PWRSRC_DC BIT(1) -#define CHT_WC_PWRSRC_BAT BIT(2) +#define CHT_WC_PWRSRC_BATT BIT(2) #define CHT_WC_PWRSRC_ID_GND BIT(3) #define CHT_WC_PWRSRC_ID_FLOAT BIT(4) @@ -158,7 +158,7 @@ static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext, ret); return EXTCON_CHG_USB_SDP; case CHT_WC_USBSRC_TYPE_SDP: - case CHT_WC_USBSRC_TYPE_FLOAT_DP_DN: + case CHT_WC_USBSRC_TYPE_FLOATING: case CHT_WC_USBSRC_TYPE_OTHER: return EXTCON_CHG_USB_SDP; case CHT_WC_USBSRC_TYPE_CDP: @@ -279,7 +279,7 @@ static int cht_wc_extcon_sw_control(struct cht_wc_extcon_data *ext, bool enable) { int ret, mask, val; - mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF_MASK; + mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF; val = enable ? mask : 0; ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL0, mask, val); if (ret) |