diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2023-02-03 11:26:49 -0800 |
|---|---|---|
| committer | Ard Biesheuvel <ardb@kernel.org> | 2023-02-03 23:59:58 +0100 |
| commit | b0048092f7d3921d56f2c5bfa32062fac5e7500b (patch) | |
| tree | 944551fab3873afdb5578ab0267a4153d5550579 /drivers/firmware | |
| parent | 1758817e7ea822b1a7d1b95f0c35dd80d120805b (diff) | |
| download | linux-b0048092f7d3921d56f2c5bfa32062fac5e7500b.tar.gz linux-b0048092f7d3921d56f2c5bfa32062fac5e7500b.tar.bz2 linux-b0048092f7d3921d56f2c5bfa32062fac5e7500b.zip | |
efi/cper, cxl: Remove cxl_err.h
While going to create include/linux/cxl.h for some cross-subsystem CXL
definitions I noticed that include/linux/cxl_err.h was already present.
That header has no reason to be global, and it duplicates the RAS
Capability Structure definitions in drivers/cxl/cxl.h. A follow-on patch
can consider unifying the CXL native error tracing with the CPER error
printing.
Also fixed up the spec reference as the latest released spec is v3.0.
Cc: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Diffstat (limited to 'drivers/firmware')
| -rw-r--r-- | drivers/firmware/efi/cper_cxl.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c index 53e435c4f310..a55771b99a97 100644 --- a/drivers/firmware/efi/cper_cxl.c +++ b/drivers/firmware/efi/cper_cxl.c @@ -9,7 +9,6 @@ #include <linux/cper.h> #include "cper_cxl.h" -#include <linux/cxl_err.h> #define PROT_ERR_VALID_AGENT_TYPE BIT_ULL(0) #define PROT_ERR_VALID_AGENT_ADDRESS BIT_ULL(1) @@ -19,6 +18,17 @@ #define PROT_ERR_VALID_DVSEC BIT_ULL(5) #define PROT_ERR_VALID_ERROR_LOG BIT_ULL(6) +/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */ +struct cxl_ras_capability_regs { + u32 uncor_status; + u32 uncor_mask; + u32 uncor_severity; + u32 cor_status; + u32 cor_mask; + u32 cap_control; + u32 header_log[16]; +}; + static const char * const prot_err_agent_type_strs[] = { "Restricted CXL Device", "Restricted CXL Host Downstream Port", |