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author | Kang Luwei <luwei.kang@intel.com> | 2018-06-30 08:53:24 +0800 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-15 13:55:46 +0200 |
commit | 29de76240e861d52b75405166337e94184f1875d (patch) | |
tree | 6332ab2f0ff81745d13f4fc818e6d4c49fc07af0 /drivers/fpga/Makefile | |
parent | 620e1902f6fe57ddacdabd9e33fadbd290be9652 (diff) | |
download | linux-29de76240e861d52b75405166337e94184f1875d.tar.gz linux-29de76240e861d52b75405166337e94184f1875d.tar.bz2 linux-29de76240e861d52b75405166337e94184f1875d.zip |
fpga: dfl: fme: add partial reconfiguration sub feature support
Partial Reconfiguration (PR) is the most important function for FME. It
allows reconfiguration for given Port/Accelerated Function Unit (AFU).
It creates platform devices for fpga-mgr, fpga-regions and fpga-bridges,
and invokes fpga-region's interface (fpga_region_program_fpga) for PR
operation once PR request received via ioctl. Below user space interface
is exposed by this sub feature.
Ioctl interface:
* DFL_FPGA_FME_PORT_PR
Do partial reconfiguration per information from userspace, including
target port(AFU), buffer size and address info. It returns error code
to userspace if failed. For detailed PR error information, user needs
to read fpga-mgr's status sysfs interface.
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Kang Luwei <luwei.kang@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/Makefile')
-rw-r--r-- | drivers/fpga/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index db11f340ba0f..fd334d40aa1c 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -33,7 +33,7 @@ obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o obj-$(CONFIG_FPGA_DFL) += dfl.o obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o -dfl-fme-objs := dfl-fme-main.o +dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o # Drivers for FPGAs which implement DFL obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o |