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authorBrendan Tam <Brendan.Tam@amd.com>2025-03-14 13:09:13 -0400
committerAlex Deucher <alexander.deucher@amd.com>2025-03-26 17:43:25 -0400
commit8058061ed9d6bc259d1e678607b07d259342c08f (patch)
tree7841f629048a57dde5230767da6ad289171b0770 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
parent0389f2a3a23c9a2d4cf58d2ab0d3b283f19e8630 (diff)
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drm/amd/display: prevent hang on link training fail
[Why] When link training fails, the phy clock will be disabled. However, in enable_streams, it is assumed that link training succeeded and the mux selects the phy clock, causing a hang when a register write is made. [How] When enable_stream is hit, check if link training failed. If it did, fall back to the ref clock to avoid a hang and keep the system in a recoverable state. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Brendan Tam <Brendan.Tam@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
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