diff options
author | Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> | 2023-01-17 14:35:41 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2023-02-14 16:06:38 -0500 |
commit | 35f33086b1b9cf5d85f55b36c75b92f8cccfbf12 (patch) | |
tree | 9e60316e4261bcf4fa10a364aa0b96c55083bec5 /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | |
parent | 5ca38a18b5a47017d0e9a016661dad12322767fa (diff) | |
download | linux-35f33086b1b9cf5d85f55b36c75b92f8cccfbf12.tar.gz linux-35f33086b1b9cf5d85f55b36c75b92f8cccfbf12.tar.bz2 linux-35f33086b1b9cf5d85f55b36c75b92f8cccfbf12.zip |
drm/amd/display: Add support for multiple overlay planes
[Why]
We only allowed 1 overlay plane. But now some ASICS can support multiple
overlay planes.
[How]
Use max_slave_planes as the number of overlays we can support.
Also since we cannot draw cursor over a video plane, we need to make
sure that we reject commits where the topmost plane is a video plane
(overlay only).
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 3c50b3ff7954..28fb1f02591a 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -67,7 +67,16 @@ static const uint32_t overlay_formats[] = { DRM_FORMAT_RGBA8888, DRM_FORMAT_XBGR8888, DRM_FORMAT_ABGR8888, - DRM_FORMAT_RGB565 + DRM_FORMAT_RGB565, + DRM_FORMAT_NV21, + DRM_FORMAT_NV12, + DRM_FORMAT_P010 +}; + +static const uint32_t video_formats[] = { + DRM_FORMAT_NV21, + DRM_FORMAT_NV12, + DRM_FORMAT_P010 }; static const u32 cursor_formats[] = { @@ -1616,3 +1625,14 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, return 0; } +bool is_video_format(uint32_t format) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(video_formats); i++) + if (format == video_formats[i]) + return true; + + return false; +} + |