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authorAlex Deucher <alexander.deucher@amd.com>2017-06-15 16:21:43 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:19:36 -0400
commit8fa9ca2ec6919656db87391a1633692ee8d57c22 (patch)
treecd25e156343f2da06963e46e7944aead77c60823 /drivers/gpu/drm/amd/display/dc/dc.h
parent7fc6ff772b22cad6fc5fe06b0dfa3f730559faf4 (diff)
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drm/amd/display: Remove DCE12 guards
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index bc15065e489b..106addc937ca 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -55,9 +55,7 @@ struct dc_caps {
struct dc_dcc_surface_param {
enum surface_pixel_format format;
struct dc_size surface_size;
-#if defined(CONFIG_DRM_AMD_DC_DCE12_0)
enum swizzle_mode_values swizzle_mode;
-#endif
enum dc_scan_direction scan;
};
@@ -146,9 +144,7 @@ struct dc_debug {
bool disable_stutter;
bool disable_dcc;
bool disable_dfs_bypass;
-#if defined(CONFIG_DRM_AMD_DC_DCE12_0)
bool disable_pplib_clock_request;
-#endif
bool disable_clock_gate;
bool disable_dmcu;
bool force_abm_enable;
@@ -163,7 +159,6 @@ struct dc {
struct dc_debug debug;
};
-#if defined(CONFIG_DRM_AMD_DC_DCE12_0)
enum frame_buffer_mode {
FRAME_BUFFER_MODE_LOCAL_ONLY = 0,
FRAME_BUFFER_MODE_ZFB_ONLY,
@@ -178,7 +173,6 @@ struct dchub_init_data {
uint64_t zfb_size_in_byte;
enum frame_buffer_mode fb_mode;
};
-#endif
struct dc_init_data {
struct hw_asic_id asic_id;
@@ -200,9 +194,7 @@ struct dc *dc_create(const struct dc_init_data *init_params);
void dc_destroy(struct dc **dc);
-#if defined(CONFIG_DRM_AMD_DC_DCE12_0)
bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data);
-#endif
/*******************************************************************************
* Surface Interfaces