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| author | Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> | 2019-11-06 14:48:35 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-13 15:29:44 -0500 |
| commit | b86a1aa36a92bcfbc062c5e99c1d084f27f25bab (patch) | |
| tree | 8eee374e066e9e51a4bf9aaa36b507aa5c38bf45 /drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | |
| parent | aca935c7cc866a935a61769c9e9782dd834a8502 (diff) | |
| download | linux-b86a1aa36a92bcfbc062c5e99c1d084f27f25bab.tar.gz linux-b86a1aa36a92bcfbc062c5e99c1d084f27f25bab.tar.bz2 linux-b86a1aa36a92bcfbc062c5e99c1d084f27f25bab.zip | |
drm/amd/display: rename DCN1_0 kconfig to DCN
Since dcn20 and dcn21 are under dcn1 it doesnt make sense to
have it named dcn1.
Change it to "dcn" to make it generic
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index 898decadb8e6..2e992fbc0d71 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c @@ -905,7 +905,7 @@ static bool dce112_program_pix_clk( struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source); struct bp_pixel_clock_parameters bp_pc_params = {0}; -#if defined(CONFIG_DRM_AMD_DC_DCN1_0) +#if defined(CONFIG_DRM_AMD_DC_DCN) if (IS_FPGA_MAXIMUS_DC(clock_source->ctx->dce_environment)) { unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0; unsigned dp_dto_ref_100hz = 7000000; |