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authorAshley Thomas <Ashley.Thomas2@amd.com>2020-10-01 00:16:05 -0700
committerAlex Deucher <alexander.deucher@amd.com>2020-10-26 13:27:52 -0400
commit9248681f68b725d2647ca7dbae281c9b34977519 (patch)
tree7e723507977e32a4438b70cfea2cf230767d933d /drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
parent2e7b43e629100b4072fac5eef53bd28235e59aa3 (diff)
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drm/amd/display: Source minimum HBlank support
[Why] Some sink devices wish to have access to the minimum HBlank supported by the ASIC. [How] Make the ASIC minimum HBlank available in Source Device information address 0x340. Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
index 3d782b7c86cb..f1e3d2888eac 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
@@ -1075,6 +1075,7 @@ static bool dce120_resource_construct(
dc->caps.i2c_speed_in_khz = 100;
dc->caps.i2c_speed_in_khz_hdcp = 100; /*1.4 w/a not applied by default*/
dc->caps.max_cursor_size = 128;
+ dc->caps.min_horizontal_blanking_period = 80;
dc->caps.dual_link_dvi = true;
dc->caps.psp_setup_panel_mode = true;
dc->caps.extended_aux_timeout_support = false;